common.cuh 22 KB

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  1. /**
  2. * llama.cpp - commit 3f1ae2e32cde00c39b96be6d01c2997c29bae555 - do not edit this file
  3. *
  4. * MIT License
  5. *
  6. * Copyright (c) 2023-2024 The ggml authors
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a copy
  9. * of this software and associated documentation files (the "Software"), to deal
  10. * in the Software without restriction, including without limitation the rights
  11. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12. * copies of the Software, and to permit persons to whom the Software is
  13. * furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in all
  16. * copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  24. * SOFTWARE.
  25. */
  26. #pragma once
  27. #include "ggml.h"
  28. #include "ggml-cuda.h"
  29. #include <cstdint>
  30. #include <memory>
  31. #if defined(GGML_USE_HIPBLAS)
  32. #define GGML_COMMON_DECL_HIP
  33. #define GGML_COMMON_IMPL_HIP
  34. #else
  35. #define GGML_COMMON_DECL_CUDA
  36. #define GGML_COMMON_IMPL_CUDA
  37. #if defined(GGML_USE_MUSA)
  38. #define GGML_COMMON_DECL_MUSA
  39. #define GGML_COMMON_IMPL_MUSA
  40. #endif
  41. #endif
  42. #include "ggml-common.h"
  43. #include <cstdio>
  44. #include <array>
  45. #include <cassert>
  46. #include <cfloat>
  47. #include <string>
  48. #include <vector>
  49. #if defined(GGML_USE_HIPBLAS)
  50. #include "vendors/hip.h"
  51. #elif defined(GGML_USE_MUSA)
  52. #include "vendors/musa.h"
  53. #else
  54. #include "vendors/cuda.h"
  55. #endif // defined(GGML_USE_HIPBLAS)
  56. #define STRINGIZE_IMPL(...) #__VA_ARGS__
  57. #define STRINGIZE(...) STRINGIZE_IMPL(__VA_ARGS__)
  58. #define WARP_SIZE 32
  59. #define CUDART_HMAX 11070 // CUDA 11.7, min. ver. for which __hmax and __hmax2 are known to work (may be higher than needed)
  60. #define CUDART_HMASK 12000 // CUDA 12.0, min. ver. for half2 -> uint mask comparisons
  61. #define CC_PASCAL 600
  62. #define MIN_CC_DP4A 610 // minimum compute capability for __dp4a, an intrinsic for byte-wise dot products
  63. #define CC_VOLTA 700
  64. #define CC_TURING 750
  65. #define CC_AMPERE 800
  66. #define CC_OFFSET_AMD 1000000
  67. #define CC_RDNA1 (CC_OFFSET_AMD + 1010)
  68. #define CC_RDNA2 (CC_OFFSET_AMD + 1030)
  69. #define CC_RDNA3 (CC_OFFSET_AMD + 1100)
  70. #define CC_QY1 210
  71. #define CC_QY2 220
  72. #define MATRIX_ROW_PADDING 512 // last row of quant. matrices is a multiple of this to avoid out-of-bounds memory accesses
  73. #if defined(_MSC_VER)
  74. #pragma warning(disable: 4244 4267) // possible loss of data
  75. #endif
  76. #define GGML_CUDA_MAX_STREAMS 8
  77. [[noreturn]]
  78. void ggml_cuda_error(const char * stmt, const char * func, const char * file, int line, const char * msg);
  79. #define CUDA_CHECK_GEN(err, success, error_fn) \
  80. do { \
  81. auto err_ = (err); \
  82. if (err_ != (success)) { \
  83. ggml_cuda_error(#err, __func__, __FILE__, __LINE__, error_fn(err_)); \
  84. } \
  85. } while (0)
  86. #define CUDA_CHECK(err) CUDA_CHECK_GEN(err, cudaSuccess, cudaGetErrorString)
  87. #if CUDART_VERSION >= 12000 || defined(GGML_USE_MUSA)
  88. static const char * cublas_get_error_str(const cublasStatus_t err) {
  89. return cublasGetStatusString(err);
  90. }
  91. #else
  92. static const char * cublas_get_error_str(const cublasStatus_t err) {
  93. switch (err) {
  94. case CUBLAS_STATUS_SUCCESS: return "CUBLAS_STATUS_SUCCESS";
  95. case CUBLAS_STATUS_NOT_INITIALIZED: return "CUBLAS_STATUS_NOT_INITIALIZED";
  96. case CUBLAS_STATUS_ALLOC_FAILED: return "CUBLAS_STATUS_ALLOC_FAILED";
  97. case CUBLAS_STATUS_INVALID_VALUE: return "CUBLAS_STATUS_INVALID_VALUE";
  98. case CUBLAS_STATUS_ARCH_MISMATCH: return "CUBLAS_STATUS_ARCH_MISMATCH";
  99. case CUBLAS_STATUS_MAPPING_ERROR: return "CUBLAS_STATUS_MAPPING_ERROR";
  100. case CUBLAS_STATUS_EXECUTION_FAILED: return "CUBLAS_STATUS_EXECUTION_FAILED";
  101. case CUBLAS_STATUS_INTERNAL_ERROR: return "CUBLAS_STATUS_INTERNAL_ERROR";
  102. case CUBLAS_STATUS_NOT_SUPPORTED: return "CUBLAS_STATUS_NOT_SUPPORTED";
  103. default: return "unknown error";
  104. }
  105. }
  106. #endif // CUDART_VERSION >= 12000
  107. #define CUBLAS_CHECK(err) CUDA_CHECK_GEN(err, CUBLAS_STATUS_SUCCESS, cublas_get_error_str)
  108. #if !defined(GGML_USE_HIPBLAS)
  109. static const char * cu_get_error_str(CUresult err) {
  110. const char * err_str;
  111. cuGetErrorString(err, &err_str);
  112. return err_str;
  113. }
  114. #define CU_CHECK(err) CUDA_CHECK_GEN(err, CUDA_SUCCESS, cu_get_error_str)
  115. #endif
  116. #if CUDART_VERSION >= 11100 || defined(GGML_USE_MUSA)
  117. #define GGML_CUDA_ASSUME(x) __builtin_assume(x)
  118. #else
  119. #define GGML_CUDA_ASSUME(x)
  120. #endif // CUDART_VERSION >= 11100
  121. #ifdef GGML_CUDA_F16
  122. typedef half dfloat; // dequantize float
  123. typedef half2 dfloat2;
  124. #else
  125. typedef float dfloat; // dequantize float
  126. typedef float2 dfloat2;
  127. #endif // GGML_CUDA_F16
  128. #if (defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) || __CUDA_ARCH__ >= CC_PASCAL
  129. #define FP16_AVAILABLE
  130. #endif // (defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) || __CUDA_ARCH__ >= CC_PASCAL
  131. #if defined(FP16_AVAILABLE) && __CUDA_ARCH__ != 610
  132. #define FAST_FP16_AVAILABLE
  133. #endif // defined(FP16_AVAILABLE) && __CUDA_ARCH__ != 610
  134. #if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_VOLTA
  135. #define FP16_MMA_AVAILABLE
  136. #endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_VOLTA
  137. #if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_TURING
  138. #define INT8_MMA_AVAILABLE
  139. #endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_TURING
  140. #if !(defined(GGML_USE_MUSA) && __MUSA_ARCH__ <= CC_QY1)
  141. #define FLASH_ATTN_AVAILABLE
  142. #endif // !(defined(GGML_USE_MUSA) && __MUSA_ARCH__ <= CC_QY1)
  143. static constexpr bool fast_fp16_available(const int cc) {
  144. return cc >= CC_PASCAL && cc != 610;
  145. }
  146. static constexpr bool fp16_mma_available(const int cc) {
  147. return cc < CC_OFFSET_AMD && cc >= CC_VOLTA;
  148. }
  149. static constexpr bool int8_mma_available(const int cc) {
  150. return cc < CC_OFFSET_AMD && cc >= CC_TURING;
  151. }
  152. [[noreturn]]
  153. static __device__ void no_device_code(
  154. const char * file_name, const int line, const char * function_name, const int arch, const char * arch_list) {
  155. #if defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
  156. printf("%s:%d: ERROR: HIP kernel %s has no device code compatible with HIP arch %d.\n",
  157. file_name, line, function_name, arch);
  158. GGML_UNUSED(arch_list);
  159. #else
  160. printf("%s:%d: ERROR: CUDA kernel %s has no device code compatible with CUDA arch %d. ggml-cuda.cu was compiled for: %s\n",
  161. file_name, line, function_name, arch, arch_list);
  162. #endif // defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
  163. __trap();
  164. GGML_UNUSED(no_device_code); // suppress unused function warning
  165. }
  166. #ifdef __CUDA_ARCH__
  167. #define NO_DEVICE_CODE no_device_code(__FILE__, __LINE__, __FUNCTION__, __CUDA_ARCH__, STRINGIZE(__CUDA_ARCH_LIST__))
  168. #else
  169. #define NO_DEVICE_CODE //GGML_ABORT("NO_DEVICE_CODE not valid in host code.")
  170. #endif // __CUDA_ARCH__
  171. static __device__ __forceinline__ float warp_reduce_sum(float x) {
  172. #pragma unroll
  173. for (int mask = 16; mask > 0; mask >>= 1) {
  174. x += __shfl_xor_sync(0xffffffff, x, mask, 32);
  175. }
  176. return x;
  177. }
  178. static __device__ __forceinline__ float2 warp_reduce_sum(float2 a) {
  179. #pragma unroll
  180. for (int mask = 16; mask > 0; mask >>= 1) {
  181. a.x += __shfl_xor_sync(0xffffffff, a.x, mask, 32);
  182. a.y += __shfl_xor_sync(0xffffffff, a.y, mask, 32);
  183. }
  184. return a;
  185. }
  186. static __device__ __forceinline__ half2 warp_reduce_sum(half2 a) {
  187. #ifdef FP16_AVAILABLE
  188. #if defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
  189. #pragma unroll
  190. for (int mask = 16; mask > 0; mask >>= 1) {
  191. const half2 a_other = __shfl_xor_sync(0xffffffff, a, mask, 32);
  192. reinterpret_cast<half&>(a.x) += __low2half(a_other);
  193. reinterpret_cast<half&>(a.y) += __high2half(a_other);
  194. }
  195. return a;
  196. #else
  197. #pragma unroll
  198. for (int mask = 16; mask > 0; mask >>= 1) {
  199. a = __hadd2(a, __shfl_xor_sync(0xffffffff, a, mask, 32));
  200. }
  201. return a;
  202. #endif // defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
  203. #else
  204. NO_DEVICE_CODE;
  205. return a;
  206. #endif // FP16_AVAILABLE
  207. }
  208. static __device__ __forceinline__ float warp_reduce_max(float x) {
  209. #pragma unroll
  210. for (int mask = 16; mask > 0; mask >>= 1) {
  211. x = fmaxf(x, __shfl_xor_sync(0xffffffff, x, mask, 32));
  212. }
  213. return x;
  214. }
  215. static __device__ __forceinline__ half ggml_cuda_hmax(const half a, const half b) {
  216. #ifdef FP16_AVAILABLE
  217. #if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && CUDART_VERSION < CUDART_HMAX
  218. return __float2half(fmaxf(__half2float(a), __half2float(b)));
  219. #else
  220. return __hmax(a, b);
  221. #endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && CUDART_VERSION < CUDART_HMAX
  222. #else
  223. NO_DEVICE_CODE;
  224. GGML_UNUSED(b);
  225. return a;
  226. #endif // FP16_AVAILABLE
  227. }
  228. static __device__ __forceinline__ half2 ggml_cuda_hmax2(const half2 a, const half2 b) {
  229. #if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__))
  230. #if CUDART_VERSION >= CUDART_HMAX
  231. return __hmax2(a, b);
  232. #else
  233. half2 ret;
  234. reinterpret_cast<half&>(ret.x) = __float2half(fmaxf( __low2float(a), __low2float(b)));
  235. reinterpret_cast<half&>(ret.y) = __float2half(fmaxf(__high2float(a), __high2float(b)));
  236. return ret;
  237. #endif // CUDART_VERSION >= CUDART_HMAX
  238. #else
  239. GGML_UNUSED(a);
  240. GGML_UNUSED(b);
  241. NO_DEVICE_CODE;
  242. #endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__))
  243. }
  244. static __device__ __forceinline__ half2 warp_reduce_max(half2 x) {
  245. #if !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL
  246. #pragma unroll
  247. for (int mask = 16; mask > 0; mask >>= 1) {
  248. x = ggml_cuda_hmax2(x, __shfl_xor_sync(0xffffffff, x, mask, 32));
  249. }
  250. return x;
  251. #else
  252. GGML_UNUSED(x);
  253. NO_DEVICE_CODE;
  254. #endif // !(defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)) && __CUDA_ARCH__ >= CC_PASCAL
  255. }
  256. #if CUDART_VERSION < CUDART_HMASK
  257. static __device__ __forceinline__ uint32_t __hgt2_mask(const half2 a, const half2 b) {
  258. const uint32_t mask_low = 0x0000FFFF * (float( __low2half(a)) > float( __low2half(b)));
  259. const uint32_t mask_high = 0xFFFF0000 * (float(__high2half(a)) > float(__high2half(b)));
  260. return mask_low | mask_high;
  261. }
  262. #endif // CUDART_VERSION < CUDART_HMASK
  263. static __device__ __forceinline__ int ggml_cuda_dp4a(const int a, const int b, int c) {
  264. #if defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
  265. #if defined(__gfx906__) || defined(__gfx908__) || defined(__gfx90a__) || defined(RDNA2)
  266. c = __builtin_amdgcn_sdot4(a, b, c, false);
  267. #elif defined(RDNA3)
  268. c = __builtin_amdgcn_sudot4( true, a, true, b, c, false);
  269. #elif defined(__gfx1010__) || defined(__gfx900__)
  270. int tmp1;
  271. int tmp2;
  272. asm("\n \
  273. v_mul_i32_i24 %1, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0 \n \
  274. v_mul_i32_i24 %2, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:BYTE_1 \n \
  275. v_add3_u32 %0, %1, %2, %0 \n \
  276. v_mul_i32_i24 %1, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:BYTE_2 \n \
  277. v_mul_i32_i24 %2, sext(%3), sext(%4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:BYTE_3 \n \
  278. v_add3_u32 %0, %1, %2, %0 \n \
  279. "
  280. : "+v"(c), "=&v"(tmp1), "=&v"(tmp2)
  281. : "v"(a), "v"(b)
  282. );
  283. #else
  284. const int8x4_t va = reinterpret_cast<const int8x4_t&>(a);
  285. const int8x4_t vb = reinterpret_cast<const int8x4_t&>(b);
  286. c += va[0] * vb[0] + va[1] * vb[1] + va[2] * vb[2] + va[3] * vb[3];
  287. #endif
  288. return c;
  289. #else // defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
  290. #if __CUDA_ARCH__ >= MIN_CC_DP4A
  291. return __dp4a(a, b, c);
  292. #else // __CUDA_ARCH__ >= MIN_CC_DP4A
  293. const int8_t * a8 = (const int8_t *) &a;
  294. const int8_t * b8 = (const int8_t *) &b;
  295. return c + a8[0]*b8[0] + a8[1]*b8[1] + a8[2]*b8[2] + a8[3]*b8[3];
  296. #endif // __CUDA_ARCH__ >= MIN_CC_DP4A
  297. #endif // defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
  298. }
  299. // TODO: move to ggml-common.h
  300. static constexpr __device__ int8_t kvalues_iq4nl[16] = {-127, -104, -83, -65, -49, -35, -22, -10, 1, 13, 25, 38, 53, 69, 89, 113};
  301. typedef void (*dequantize_kernel_t)(const void * vx, const int64_t ib, const int iqs, dfloat2 & v);
  302. static __device__ __forceinline__ float get_alibi_slope(
  303. const float max_bias, const uint32_t h, const uint32_t n_head_log2, const float m0, const float m1
  304. ) {
  305. if (max_bias <= 0.0f) {
  306. return 1.0f;
  307. }
  308. const float base = h < n_head_log2 ? m0 : m1;
  309. const int exph = h < n_head_log2 ? h + 1 : 2*(h - n_head_log2) + 1;
  310. return powf(base, exph);
  311. }
  312. template <ggml_type type>
  313. struct ggml_cuda_type_traits;
  314. template<>
  315. struct ggml_cuda_type_traits<GGML_TYPE_F16> {
  316. static constexpr int qk = 1;
  317. static constexpr int qr = 1;
  318. };
  319. template<>
  320. struct ggml_cuda_type_traits<GGML_TYPE_Q4_0> {
  321. static constexpr int qk = QK4_0;
  322. static constexpr int qr = QR4_0;
  323. static constexpr int qi = QI4_0;
  324. };
  325. template<>
  326. struct ggml_cuda_type_traits<GGML_TYPE_Q4_1> {
  327. static constexpr int qk = QK4_1;
  328. static constexpr int qr = QR4_1;
  329. static constexpr int qi = QI4_1;
  330. };
  331. template<>
  332. struct ggml_cuda_type_traits<GGML_TYPE_Q5_0> {
  333. static constexpr int qk = QK5_0;
  334. static constexpr int qr = QR5_0;
  335. static constexpr int qi = QI5_0;
  336. };
  337. template<>
  338. struct ggml_cuda_type_traits<GGML_TYPE_Q5_1> {
  339. static constexpr int qk = QK5_1;
  340. static constexpr int qr = QR5_1;
  341. static constexpr int qi = QI5_1;
  342. };
  343. template<>
  344. struct ggml_cuda_type_traits<GGML_TYPE_Q8_0> {
  345. static constexpr int qk = QK8_0;
  346. static constexpr int qr = QR8_0;
  347. static constexpr int qi = QI8_0;
  348. };
  349. template<>
  350. struct ggml_cuda_type_traits<GGML_TYPE_Q2_K> {
  351. static constexpr int qk = QK_K;
  352. static constexpr int qr = QR2_K;
  353. static constexpr int qi = QI2_K;
  354. };
  355. template<>
  356. struct ggml_cuda_type_traits<GGML_TYPE_Q3_K> {
  357. static constexpr int qk = QK_K;
  358. static constexpr int qr = QR3_K;
  359. static constexpr int qi = QI3_K;
  360. };
  361. template<>
  362. struct ggml_cuda_type_traits<GGML_TYPE_Q4_K> {
  363. static constexpr int qk = QK_K;
  364. static constexpr int qr = QR4_K;
  365. static constexpr int qi = QI4_K;
  366. };
  367. template<>
  368. struct ggml_cuda_type_traits<GGML_TYPE_Q5_K> {
  369. static constexpr int qk = QK_K;
  370. static constexpr int qr = QR5_K;
  371. static constexpr int qi = QI5_K;
  372. };
  373. template<>
  374. struct ggml_cuda_type_traits<GGML_TYPE_Q6_K> {
  375. static constexpr int qk = QK_K;
  376. static constexpr int qr = QR6_K;
  377. static constexpr int qi = QI6_K;
  378. };
  379. template<>
  380. struct ggml_cuda_type_traits<GGML_TYPE_IQ2_XXS> {
  381. static constexpr int qk = QK_K;
  382. static constexpr int qr = QR2_XXS;
  383. static constexpr int qi = QI2_XXS;
  384. };
  385. template<>
  386. struct ggml_cuda_type_traits<GGML_TYPE_IQ2_XS> {
  387. static constexpr int qk = QK_K;
  388. static constexpr int qr = QR2_XS;
  389. static constexpr int qi = QI2_XS;
  390. };
  391. template<>
  392. struct ggml_cuda_type_traits<GGML_TYPE_IQ2_S> {
  393. static constexpr int qk = QK_K;
  394. static constexpr int qr = QR2_S;
  395. static constexpr int qi = QI2_S;
  396. };
  397. template<>
  398. struct ggml_cuda_type_traits<GGML_TYPE_IQ3_XXS> {
  399. static constexpr int qk = QK_K;
  400. static constexpr int qr = QR3_XXS;
  401. static constexpr int qi = QI3_XXS;
  402. };
  403. template<>
  404. struct ggml_cuda_type_traits<GGML_TYPE_IQ1_S> {
  405. static constexpr int qk = QK_K;
  406. static constexpr int qr = QR1_S;
  407. static constexpr int qi = QI1_S;
  408. };
  409. template<>
  410. struct ggml_cuda_type_traits<GGML_TYPE_IQ1_M> {
  411. static constexpr int qk = QK_K;
  412. static constexpr int qr = QR1_M;
  413. static constexpr int qi = QI1_M;
  414. };
  415. template<>
  416. struct ggml_cuda_type_traits<GGML_TYPE_IQ4_NL> {
  417. static constexpr int qk = QK4_NL;
  418. static constexpr int qr = QR4_NL;
  419. static constexpr int qi = QI4_NL;
  420. };
  421. template<>
  422. struct ggml_cuda_type_traits<GGML_TYPE_IQ4_XS> {
  423. static constexpr int qk = QK_K;
  424. static constexpr int qr = QR4_XS;
  425. static constexpr int qi = QI4_XS;
  426. };
  427. template<>
  428. struct ggml_cuda_type_traits<GGML_TYPE_IQ3_S> {
  429. static constexpr int qk = QK_K;
  430. static constexpr int qr = QR3_S;
  431. static constexpr int qi = QI3_S;
  432. };
  433. //////////////////////
  434. struct ggml_cuda_device_info {
  435. int device_count;
  436. struct cuda_device_info {
  437. int cc; // compute capability
  438. int nsm; // number of streaming multiprocessors
  439. size_t smpb; // max. shared memory per block
  440. size_t smpbo; // max. shared memory per block (with opt-in)
  441. bool vmm; // virtual memory support
  442. size_t vmm_granularity; // granularity of virtual memory
  443. size_t total_vram;
  444. };
  445. cuda_device_info devices[GGML_CUDA_MAX_DEVICES] = {};
  446. std::array<float, GGML_CUDA_MAX_DEVICES> default_tensor_split = {};
  447. };
  448. const ggml_cuda_device_info & ggml_cuda_info();
  449. void ggml_cuda_set_device(int device);
  450. int ggml_cuda_get_device();
  451. struct ggml_cuda_pool {
  452. virtual ~ggml_cuda_pool() = default;
  453. virtual void * alloc(size_t size, size_t * actual_size) = 0;
  454. virtual void free(void * ptr, size_t size) = 0;
  455. };
  456. template<typename T>
  457. struct ggml_cuda_pool_alloc {
  458. ggml_cuda_pool * pool = nullptr;
  459. T * ptr = nullptr;
  460. size_t actual_size = 0;
  461. ggml_cuda_pool_alloc() = default;
  462. explicit ggml_cuda_pool_alloc(ggml_cuda_pool & pool) : pool(&pool) {
  463. }
  464. ggml_cuda_pool_alloc(ggml_cuda_pool & pool, size_t size) : pool(&pool) {
  465. alloc(size);
  466. }
  467. ~ggml_cuda_pool_alloc() {
  468. if (ptr != nullptr) {
  469. pool->free(ptr, actual_size);
  470. }
  471. }
  472. // size is in number of elements
  473. T * alloc(size_t size) {
  474. GGML_ASSERT(pool != nullptr);
  475. GGML_ASSERT(ptr == nullptr);
  476. ptr = (T *) pool->alloc(size * sizeof(T), &this->actual_size);
  477. return ptr;
  478. }
  479. T * alloc(ggml_cuda_pool & pool, size_t size) {
  480. this->pool = &pool;
  481. return alloc(size);
  482. }
  483. T * get() {
  484. return ptr;
  485. }
  486. ggml_cuda_pool_alloc(const ggml_cuda_pool_alloc &) = delete;
  487. ggml_cuda_pool_alloc(ggml_cuda_pool_alloc &&) = delete;
  488. ggml_cuda_pool_alloc& operator=(const ggml_cuda_pool_alloc &) = delete;
  489. ggml_cuda_pool_alloc& operator=(ggml_cuda_pool_alloc &&) = delete;
  490. };
  491. // backend interface
  492. struct ggml_tensor_extra_gpu {
  493. void * data_device[GGML_CUDA_MAX_DEVICES]; // 1 pointer for each device for split tensors
  494. cudaEvent_t events[GGML_CUDA_MAX_DEVICES][GGML_CUDA_MAX_STREAMS]; // events for synchronizing multiple GPUs
  495. };
  496. #if (CUDART_VERSION >= 12000) && defined(GGML_CUDA_USE_GRAPHS)
  497. #define USE_CUDA_GRAPH
  498. #endif
  499. struct ggml_graph_node_properties {
  500. void * node_address;
  501. ggml_op node_op;
  502. int64_t ne[GGML_MAX_DIMS];
  503. size_t nb[GGML_MAX_DIMS];
  504. void * src_address[GGML_MAX_SRC];
  505. int32_t op_params[GGML_MAX_OP_PARAMS / sizeof(int32_t)];
  506. };
  507. struct ggml_cuda_graph {
  508. #ifdef USE_CUDA_GRAPH
  509. ~ggml_cuda_graph() {
  510. if (instance != nullptr) {
  511. CUDA_CHECK(cudaGraphExecDestroy(instance));
  512. }
  513. if (graph != nullptr) {
  514. CUDA_CHECK(cudaGraphDestroy(graph));
  515. }
  516. }
  517. cudaGraph_t graph = nullptr;
  518. cudaGraphExec_t instance = nullptr;
  519. size_t num_nodes = 0;
  520. std::vector<cudaGraphNode_t> nodes;
  521. std::vector<cudaKernelNodeParams> params;
  522. bool disable_due_to_gpu_arch = false;
  523. bool disable_due_to_too_many_updates = false;
  524. bool disable_due_to_failed_graph_capture = false;
  525. int number_consecutive_updates = 0;
  526. std::vector<ggml_graph_node_properties> ggml_graph_properties;
  527. std::vector<char **> updated_kernel_arg;
  528. #endif
  529. };
  530. struct ggml_backend_cuda_context {
  531. int device;
  532. std::string name;
  533. cudaEvent_t copy_event = nullptr;
  534. cudaStream_t streams[GGML_CUDA_MAX_DEVICES][GGML_CUDA_MAX_STREAMS] = { { nullptr } };
  535. cublasHandle_t cublas_handles[GGML_CUDA_MAX_DEVICES] = {nullptr};
  536. std::unique_ptr<ggml_cuda_graph> cuda_graph;
  537. explicit ggml_backend_cuda_context(int device) :
  538. device(device),
  539. name(GGML_CUDA_NAME + std::to_string(device)) {
  540. }
  541. ~ggml_backend_cuda_context() {
  542. if (copy_event != nullptr) {
  543. CUDA_CHECK(cudaEventDestroy(copy_event));
  544. }
  545. for (int i = 0; i < GGML_CUDA_MAX_DEVICES; ++i) {
  546. for (int j = 0; j < GGML_CUDA_MAX_STREAMS; ++j) {
  547. if (streams[i][j] != nullptr) {
  548. CUDA_CHECK(cudaStreamDestroy(streams[i][j]));
  549. }
  550. }
  551. if (cublas_handles[i] != nullptr) {
  552. CUBLAS_CHECK(cublasDestroy(cublas_handles[i]));
  553. }
  554. }
  555. }
  556. cudaStream_t stream(int device, int stream) {
  557. if (streams[device][stream] == nullptr) {
  558. ggml_cuda_set_device(device);
  559. CUDA_CHECK(cudaStreamCreateWithFlags(&streams[device][stream], cudaStreamNonBlocking));
  560. }
  561. return streams[device][stream];
  562. }
  563. cudaStream_t stream() {
  564. return stream(device, 0);
  565. }
  566. cublasHandle_t cublas_handle(int device) {
  567. if (cublas_handles[device] == nullptr) {
  568. ggml_cuda_set_device(device);
  569. CUBLAS_CHECK(cublasCreate(&cublas_handles[device]));
  570. CUBLAS_CHECK(cublasSetMathMode(cublas_handles[device], CUBLAS_TF32_TENSOR_OP_MATH));
  571. }
  572. return cublas_handles[device];
  573. }
  574. cublasHandle_t cublas_handle() {
  575. return cublas_handle(device);
  576. }
  577. // pool
  578. std::unique_ptr<ggml_cuda_pool> pools[GGML_CUDA_MAX_DEVICES];
  579. static std::unique_ptr<ggml_cuda_pool> new_pool_for_device(int device);
  580. ggml_cuda_pool & pool(int device) {
  581. if (pools[device] == nullptr) {
  582. pools[device] = new_pool_for_device(device);
  583. }
  584. return *pools[device];
  585. }
  586. ggml_cuda_pool & pool() {
  587. return pool(device);
  588. }
  589. };